Mentor Graphics Tutorial 1
Creating gate level schematics and simulation
Design Architect and Eldo

Estimated Time: 45 minutes

Design Architect is a leading CAD/EDA tool from Mentor Graphics. It can be used to simulate gate level and transistor level circuits. In this tutorial, we will be using Design Architect to implement a NOR gate shown below, and simulate it using Eldo. Eldo is a spice-like simulator and gives the exact circuit behavior.

Fig: Completed NOR gate in Design Architect.

1. Starting Design Architect

  1. Invoke Design Architect by typing ./daic in your home directory. Click here to get the script file if you haven’t already done so.
  2. To open a new schematic file click on 'File>Open>Schematic' on the Menu bar. (Note: You need to click on the small black triangle instead of the Open button.) Open Schematic window should pop up. (NOTE: If another schematic is open and the window is highlighted the File menu will not have the Open option. Unselect the window by clicking on the background if another schematic is highlighted.)
  3. Type in your folder of choice, and click on the 'Options' button. A new window pops up. Choose the New Sheet option, type in ‘nor’ as the Schematic, and click 'Ok.' A new schematics window should open.

Fig: Open Schematics pop up window.

2. Making the schematic.

  1. Click on the 'Show/Hide Library Palette' icon in the left panel to bring up the Schematic Edit palette (palette in the right side) if it is hidden. (Second—last icon on the left panel.)
  2. Click on the Library and then the Macro Lib button on the palette to enter the Macro Library. Gate level circuit elements are available in this library. Choose the NOR gate and place it in your sheet. Press the Back button in the palette when you are done.
  3. Add two Portin and a Portout pins in your schematic from the Generic Lib.
  4. Join the wires to make your schematic look like the one below. You can just click on the edge of the wire and drag it or use the Add Wire button on the left panel to do so.
  5. All the nets should be assigned a name. Right-click on the nets (wires) and then on Name Nets to name them ‘A’, ‘B’ and ‘Out.’ Your schematic should look like the figure below when you are done.
  6. Click on File>Check Schematic on the menu bar to check for errors in the schematic. Correct the errors, and ignore the warnings if you have any.

Fig: Schematic of a NOR gate  

3. Simulation using Eldo

  1. Click on ‘Enter Simulation Mode’ icon in the left panel. (The green triangle icon.)
  2. A window should pop up. Click on the New Configuration button and then choose Digital Simulation. You should enter the Simulation Mode.
  3. Click on the Setup Sim Session icon, the first icon, on the left panel, and then on Simulator/Viewer button.
  4. Choose your simulator as Eldo and Viewer as EZwave in the pop up window.

    5. Fig: Edit Palette and window with Eldo and EZwave set as Simulator and Viewer.

  5. Click again on the Setup Sim Session icon, the first icon, on the left panel, and then choose 'Environment...' this time. A window should pop up.
  6. Choose 'Run Simulation and Display Waveforms' in the Auto-Run Simulation Setup section. Click OK.
  7. Then click on the Setup Analysis icon (third one from the top) to choose the type of analysis. Check the Transient analysis checkbox.
  8. Add the inputs, select an input net, say A, and click on the fifth icon, Setup Forces/ICS icon, on the left panel and choose Add. Select Pulse as the type of source and set the Pulse Value to be 5, Pulse Width to be 50e-9 and Period to be 100e-9.
  9. Add a Pattern source to the other input net and set the High Value to 5, Low to 0, Delay to 0, Rise and Fall Time to 1e-9, Pattern duration to 10e-9 and the Pattern to 1100110101.

    (In the following figure, a pattern was added to input A.)

    10. Fig: Setting up the Pattern source.

  10. Ctrl-click to select all the nets, then click on the Wave Outputs icon in the left panel. It is the ninth icon from the top. Then click on 'Save Selected'.
  11. Choose to Save the Voltage, uncheck the Plot item(s) checkbox on the popup window, and click OK.
  12. To create an input netlist click on the Netlist icon (thirteenth icon from the top) in the left panel. A status window should open and read ‘Done…’
  13. Click on the Run simulation icon (fourteenth icon from the top) to invoke the simulator and to display the waveform.
  14. An EZwave window should pop up and you should be able to see the graphs of A, B and Out vs. time. (Default length of simulation is 100 nsec.) Browse through the folders on the left panel and open the graphs for V(A),V(B) and V(Out) to get graphs similar to the ones given below.

Fig: Waveform from simulating the NOR gate.