E25/CS25:  Principles of Computer Architecture
Spring 2009

Thursday 4:00-6:30, Hicks 211

Instructor:
Tali Moreshet
Hicks 218, x8331


Office Hours:
By appointment


Course Description:

This course is an introduction to computer architecture. In this class, we will focus on microprocessor design, including CPU and memory, the interface between hardware and software, and an introduction to multiprocessors.

syllabus



Textbooks:

Links:


Tentative Class Schedule

NOTE: The links on this page are not accessible from outside Swarthmore.

Week Topics Readings Assignments
1
  • Introduction
  • Computer history
  • Measuring performance
Chapter 1 Homework 0
2
  • Power and technology trends
  • Number representation

Chapter 1
Chapter 2.4
Appendix C.1-C.3, C.5-6

Homework 1
3
  • ALU Arithmetic
  • Intro to Verilog
  • Instruction Set
  • MIPS assembly
Chapter 3.1-3.5
Verilog links/ on-line course
Chapter 2.1-2.7
Lab 1
Quartus II Abbreviated Manual
Homework 2
4
  • MIPS assembly - cont
  • Addressing Modes
  • Datapath and control
Chapter 2.10, 2.11, 2.17
Appendix B
Chapter 4.1-4.4
(Appendix D)
Homework 3 + Lab 2
Example MIPS program
( Path to exceptions file)
5
  • Datapath and control - cont
  • Pipelining
Chapter 4.4-4.6
(Appendix D)
Homework 4
Lab 3
( register_file.v)
6
  • Exceptions
  • Hazards, forwarding
  • Branch prediction
Chapter 4.7-4.10
Handouts
Homework 5
7
  • Branch prediction - cont
  • Caching
Handouts
Chapter 5.1-5.3, 5.5
Homework 6
Spring Break
8
  • Caching - cont
  • Memory
  • SimpleScalar
Chapter 5.1-5.3, 5.5 Lab 4
Homework 7
9
  • Virtual Memory
Chapter 5.4 Final Project
10
  • Midterm Exam - Tues. 3/31 @ 4pm
  • Exploiting ILP
  • Scheduling

Chapter 4.10-4.11
Handouts

Homework 8
Project proposals due 4.5.09 by email.
11
  • Advanced ILP techniques
  • Alpha, Pentium 4, Opteron
Chapter 4.10-4.11
Handouts
 
12
  • Multiprocessors
  • Multithreading
  • Power 5, Intel Core Duo, Barcelona
Chapter 7.1-7.6, 7.10-7.11
Handouts
Progress reports due 4.16.09.
13
  • Cache coherence
  • Synchronization
  • Cell, Niagara
  • GPUs
Chapter 5.7-5.9
Chapter 7.7
Appendix A
 
14
  • Final project presentations
  Final project reports due by 5.14.09.