E25/CS25:  Principles of Computer Architecture
Spring 2008

Hicks 211, MWF 9:30-10:20
Lab: Hicks 213, T 4:00-5:00

Instructor:
Tali Moreshet
Hicks 218, x8331


Office Hours:
TBD, Open door policy


Course Description:

This course is an introduction to computer architecture.  In this class, we will focus on microprocessor design, including CPU and memory, and will also review digital logic design.  The labs for this course will focus on microprocessor characteristics and design, using Verilog, a hardware description language, and performance simulators.  A course project enables the students to explore a particular topic of their choice in depth.

syllabus



Textbooks:

Links:


Tentative Class Schedule

NOTE: The links on this page are not accessible from outside Swarthmore.

Week Day Topics Readings Labs & HW
1
Jan 21
  • Introduction
  • Computer history
  • Number representation
Chapter 1
Chapter 3
Appendix B
Homework 1
Jan 23
Jan 25
2
Jan 28
  • ALU Arithmetic
  • Combinational logic and latency

Chapter 3
Appendix B

Lab 1: Building an ALU Homework 2
Jan 30
Feb 1
3 Feb 4
  • Instruction Set
  • Addressing Modes
Chapter 2
Homework 3
Example MIPS program
( Path to exceptions file)
Feb 6
Feb 8
4
Feb 11
  • Intro to Verilog
  • Quantifying performance
  • Datapath design
Chapter 4
Chapter 5
Lab 2: Introduction to Verilog, fourstate.v,clockdivider.v Homework 4
Feb 13
Feb 15
5 Feb 18
  • Control logic design
  • Multicycle implementation
Chapter 5
Appendix B
Appendix C
Homework 5
Feb 20
Feb 22
6
Feb 25
  • Exceptions
  • Pipelining
  • Hazards, forwarding
Chapter 6.1-6.6, 6.8
Appendix A
Lab 3: MIPS Single Cycle Implementation, register_file.v
Homework 6
Feb 27
Feb 29
7
March 3
  • Hazards, forwarding - cont
  • EXAM - 3/5, 9am
Chapter 6.6, 6.8  
March 5
March 7
Spring Break
8
March 17
  • Branch prediction
Chapter 6.6, handout Homework 7
March 19
March 21
9
March 24
  • Caching
  • Memory hierarchy
Chapter 7
Lab 4: Caching
Homework 8
March 26
March 28
10 March 31
  • Virtual memory
  • Exploiting ILP
  • Static and dynamic scheduling

Chapter 7.4
Chapter 6.9, 6.10

 
April 2
April 4
11 April 7
  • Static and dynamic scheduling
  • Superscalar design
  • Speculative execution
Chapter 6.9, 6.10
handout
Final project
Homework 9
April 9
April 11
12
April 14
  • Alpha 21264 architecture
  • Pentium architecture
Chapter 6.13.4
Kessler, "The Alpha 21164 Microprocessor"
Hinton et al, "The Microarchitecture of the Pentium4 Processor"
 
April 16
April 18
13
April 21
  • Multithreading
  • Multiprocessors
Chapter 9
IBM Power5 Chip: A Dual-Core Multithreaded Processor
Gochman et al, "Introduction to Intel Core Duo Processor Architecture"
 
April 23
April 25
14
April 28
   
April 30
May 2
May 12, 9-12 FINAL EXAM