E15:  Fundamentals of Digital Systems
Fall 2012

M W F 9:30-10:30, Hicks 211
Lab: M/W 1:15-4:15, Hicks 310

Instructor:
Tali Moreshet
Office: Hicks 218, x8331

Office Hours: Mon. 10:30-11:30am, Thur. 2:00-4:00pm, Open door policy

Wizard: Allen Welkie, Wed. 7:30-9:30pm, Hicks 211

Course Description:

This course is an introduction to the basic concepts of digital systems, including analysis and design of such systems. This consists of both combinational and sequential logic. Lectures and labs will enable students to experience with several levels of digital systems, from simple logic circuits to hardware description language and interface programming in C.

syllabus

Textbooks:

Links:

Tentative Class Schedule

NOTE: Some of the links on this page are not accessible from outside Swarthmore.

Week Dates Topics Readings & Handouts Labs & HW
1 Sep 3-Sep 7
  • Introduction
  • Logic gates
  • Binary numbers
  • Boolean algebra
Chapters 1.2-1.3, 1.9
Chapter 2
Boolean Theorems Handout		 Lab groups
Lab 1, data sheets

Homework 1, Solutions
2 Sep 10-Sep 14
  • Number systems and codes
  • Karnaugh Map
  • Optimization and minimization
 Chapters 1.4-1.7
Chapter 3.1-3.5
Homework 2, Solutions
3 Sep 17-Sep 21
  • Verilog introduction
  • Technology mapping
  • Digital arithmetic
Verilog Handout
Verilog "Cheat sheet"
Chapter 3.6-3.8
Chapter 4.1-4.6
Digital arithmetic slides

Lab 2, Quartus II Abbreviated Manual

Homework 3, Solutions
4 Sep 24-Sep 28
  • Digital arithmetic - cont
  • Useful combinational circuits
Chapter 4.1-4.12
Verilog code Handout - part 1
Verilog code Handout - part 2

Homework 4, Solutions  
5 Oct 1-Oct 5
  • Shannon's expansion theorem
  • EXAM: Wed. 10/3
  • Intro to state machines
 Overview for Chapter 5
Verilog State machine Handout

Lab 3, counter.v

Homework 5, Solutions
6 Oct 8-Oct 12
  • Sequential logic elements
  • State machine design
 Chapter 5.1-5.4
Edge Triggered D-FF Handout Flip-flop State machine Handout

Homework 6, Solutions

 
Fall Break
7 Oct 22-Oct 26
  • State machine design - cont
  • Alternative state machine design techniques
  • Registers and counters
Chapter 5.5-5.8
Chapter 8
Chapter 6
Registers Verilog Code Handout

Lab 4, Prelab
Data sheets: EZ430 schematic, I/O board schematic, EZ430 LCD spec sheet
Code: Blinky.c, Blinky2.c, Die.c, LCD.c

Homework 7, Solutions
8
Oct 29-Nov 2
  • Registers and counters - cont
  • C programming
Chapter 6
See C programming links above
How to run C on your laptop
hello.c, loops.c
C Programming Handout 1

Homework 8, Solutions
9 Nov 5-Nov 9
  • C programming -cont
See C programming links above
prime.c, char_count.c, multbytwo.c, Fibonacci.c
C Programming Handout 2

Lab 5-part I / Homework 9
10 Nov 12-Nov 16
  • C programming - cont
  • EXAM: Wed. 11/14, 8-9:30pm

See C programming links above
swapping.c, my_strlen.c, echo.c
C Programming Handout 3

 Lab 5-part II / Homework 10
11 Nov 19-Nov 23
  • Memory
  • Thanksgiving
 Chapter 7
Memory Handout

Final Project
12 Nov 26-Nov 30
  • Memory - cont
  • Programmable logic
Chapter 7
Memory Handout - part 2 Programmable Logic Handout

Homework 11, Solutions  
13 Dec 3-Dec 11
  • CMOS
  • Microcontroller architecture
 Microcontroller handouts

 Homework 12, Solutions  
  FINAL EXAM 12/21 9am