E15 Fall 2007

Instructors:
Tali Moreshet
Office: Hicks 218, x8331

Office Hours: Open door policy

Ani Hsieh
Office: Hicks 305, x8081
email: mhsieh1 at swarthmore dot edu
Office Hours: Mon & Tues 4-5pm, Thur 1-2pm

Course Description:

This class is an introduction to the basic concepts of digital systems, including analysis and design of such systems. This consists of both combinational and sequential logic. Lectures and labs will enable students to experience with several levels of digital systems, from simple logic circuits to hardware description language and interface programming in C.

syllabus

Textbooks:

M. Morris Mano and Michael D. Ciletti, Digital Design, 4th edition, Prentice Hall, 2007. (required)

Stephen Brown and Zvonko Vranesic , Fundamentals of Digital Logic with Verilog Design, 2nd edition, McGraw-Hill Higher Education, 2008. (optional)

Links:

Tentative Class Schedule

NOTE: The links on this page are not accessible from outside Swarthmore.

Week	Day	Topics	Readings	Labs & HW
1	Sep 3	Introduction Logic gates Number systems and codes	Chapter 1	Lab Guidelines Homework 1
	Sep 5
	Sep 7
2	Sep 10	Boolean algebra Optimization and minimization Karnaugh Map Quine-McCluskey method	Chapter 2 Chapter 3.1-3.6 Quine-McCluskey handout	Lab 1: Archaic digital design, part I Homework 2
	Sep 12
	Sep 14
3	Sep 17	Technology mapping Verilog introduction	Chapter 3.7-3.9	Lab 1: Archaic digital design, part II Homework 3
	Sep 19
	Sep 21
4	Sep 24	Digital arithmetic Useful combinational circuits	Chapter 4.1-4.12 Verilog code handouts	Lab 2: Modern digital design, part I Lab 2 supplement Homework 4
	Sep 26
	Sep 28
5	Oct 1	Useful combinational circuits - cont Shannon's expansion theorem EXAM - Oct. 3 Sequential logic elements	Chapter 5.1-5.4	Lab 2: Modern digital design, part II Homework 5
	Oct 3
	Oct 5
6	Oct 8	Sequential logic elements - cont State machine design	Chapter 5.5-5.8	Lab 3: Sequential circuit design, part I
	Oct 10
	Oct 12
Fall Break
7	Oct 22	State machine design - cont C programming	See C programming links above	Lab 3: Sequential circuit design, part II Homework 6
	Oct 24
	Oct 26
8	Oct 28	C programming - cont	See C programming links above	Lab 4: Microcontroller lab, part I Lab 4 files: LCD Manual, short version, C reference manual, C file Homework 7
	Oct 31
	Nov 2
9	Nov 5	Algorithmic state machine design MUX state machine design Registers and counters	Chapter 8 Chapter 6	Lab 4: Microcontroller lab, part II Homework 8
	Nov 7
	Nov 9
10	Nov 12	Registers and counters - cont EXAM - Nov. 14 Memory	Chapter 7	Lab 5: C programming, part I Lab 5 file: C file, Link to plotter application
	Nov 14
	Nov 16
11	Nov 19	Memory - cont Thanksgiving	Chapter 7	Lab 5: C programming, part II Homework 9
	Nov 21
	Nov 23
12	Nov 26	Programmable logic Microcontroller architecture	Microcontroller handouts	Final project
	Nov 28
	Nov 30
13	Dec 3	Microcontroller architecture -cont CMOS Review	Chapter 10	Final project Homework 10
	Dec 5
	Dec 7
	Dec 10
		FINAL EXAM - Dec. 14 9am-12pm

E15/CS24: Fundamentals of Digital Systems Fall 2007

E15/CS24: Fundamentals of Digital Systems
Fall 2007